This commit cherry-picks commits from the mainline kernel tree to let
the intel_pstate support the following newer CPUs in certain cases:
* Ice Lake
* Sapphire Rapids
Support for the following cases are added:
* When hardware P-states (HWP) is disabled in the BIOS/firmware, then
the intel_pstate driver will still get enabled (albeit in 'passive'
mode) for these CPUs, as opposed to the intel_pstate driver reporting
that the CPU is not supported.
* When out-of-band (OOB) P-state management is enabled with Ice Lake and
Sapphire Rapids CPUs, then the intel_pstate driver gracefully disables
itself, as the BIOS/platform firmware is responsible for managing the
HWP in such cases.
The following bullet point list depicts the commits that have been
cherry-picked, along with the output of "git describe --contains" for
each commit, to provide a sense of how recent each commit is:
* commit fbdc21e9b038 ("cpufreq: intel_pstate: Add Icelake servers
support in no-HWP mode") (v5.14-rc1~144^2~1^2~1^2~6)
* commit cd23f02f1668 ("cpufreq: intel_pstate: Add Ice Lake server to
out-of-band IDs") (v5.16-rc3~24^2~3)
* commit bbd67f1b5a94 ("cpufreq: intel_pstate: Support Sapphire Rapids
OOB mode") (v5.19-rc1~182^2~2^2~11)
* commit df51f287b5de ("cpufreq: intel_pstate: Add Sapphire Rapids
support in no-HWP mode") (v6.2-rc1~189^2~3^2~4)
We should note that we considered cherry-picking the following commits
too, but we opted to not do that due to the reasons discussed below:
* commit 706c5328851d ("cpufreq: intel_pstate: Add Cometlake support in
no-HWP mode") (v5.14-rc1~144^2~1^2~1^2~5)
* commit b6e6f8beec98 ("cpufreq: intel_pstate: Update EPP for AlderLake
mobile") (v5.17-rc1~167^2~2^2~21)
* commit 71bb5c82aaae ("cpufreq: intel_pstate: Add Tigerlake support in
no-HWP mode") (v6.1-rc1~205^2~1^2~1)
* commit 60675225ebee ("cpufreq: intel_pstate: Adjust
balance_performance EPP for Sapphire Rapids") (v6.3-rc1~21^2~6)
The commits related to Comet Lake and Tiger Lake were skipped, because
they refer to non-server class CPUs to the best of our knowledge, and
StarlingX is usually run on server-class hardware.
The commit for Alder Lake mobile CPUs is a dependency for the commit
that adjusts the Energy/Performance Preference (EPP) setting for
Sapphire Rapids CPUs. The latter commit improves performance when the
'powersave' governor is used, or when balance_performance setting is
used in the BIOS. While it is possible to cherry-pick both of these
commits (which was done in an earlier iteration of this commit), we
opted to not do that, mainly to keep the scope of this commit smaller,
and also because the two commits appeared optional (as opposed to
necessary) to us.
Verification
- The standard and real-time kernel packages were successfully built
with this commit.
- An ISO image, built with a slightly different version of this commit
for an older CentOS-based StarlingX version, containing Ice Lake
CPU-related changes only, was installed onto a server that has an Ice
Lake Xeon CPU, with HWP disabled and with out-of-band hardware P-state
management enabled in the BIOS. This resulted in the intel_pstate
driver being disabled, as expected.
- A StarlingX ISO image based on the StarlingX master branch with this
commit included was successfully installed onto a server with a
Sapphire Rapids Xeon CPU, in low-latency All-in-One simplex mode.
(Please note that the server was not Ansible-bootstrapped due to
unrelated difficulties.)
The intel_pstate driver was successfully initialized for the case
where HWP was enabled ("Native Mode") in the BIOS settings, and for
the case where HWP was turned off ("Disabled") in the BIOS settings.
For the former case, intel_pstate's status was reported as "active",
and for the latter case, intel_pstate's status was reported as
"passive", as indicated by
"/sys/devices/system/cpu/intel_pstate/status".
Prior to this commit, with HWP disabled in the BIOS, intel_pstate
would not load due to the CPU not being recognized.
- On the same server with a Sapphire Rapids CPU, enabling out-of-band
HWP management caused the intel_pstate driver to disable itself by
printing out "P-states controlled by the platform" and returning
-ENODEV, as expected.
Partial-Bug: 2016028
Change-Id: I55384c2239d6543662eeef62e86a4b8951887fd7
Signed-off-by: M. Vefa Bicakci <vefa.bicakci@windriver.com>
40 lines
1.4 KiB
Diff
40 lines
1.4 KiB
Diff
From d72271f839550c054d93e797825bd749bd5a8f6a Mon Sep 17 00:00:00 2001
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From: Adamos Ttofari <attofari@amazon.de>
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Date: Fri, 12 Nov 2021 09:16:57 +0000
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Subject: [PATCH] cpufreq: intel_pstate: Add Ice Lake server to out-of-band IDs
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Commit fbdc21e9b038 ("cpufreq: intel_pstate: Add Icelake servers
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support in no-HWP mode") enabled the use of Intel P-State driver
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for Ice Lake servers.
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But it doesn't cover the case when OS can't control P-States.
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Therefore, for Ice Lake server, if MSR_MISC_PWR_MGMT bits 8 or 18
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are enabled, then the Intel P-State driver should exit as OS can't
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control P-States.
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Fixes: fbdc21e9b038 ("cpufreq: intel_pstate: Add Icelake servers support in no-HWP mode")
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Signed-off-by: Adamos Ttofari <attofari@amazon.de>
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Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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(cherry picked from commit cd23f02f166892603eb9f2d488152b975872b682)
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Signed-off-by: M. Vefa Bicakci <vefa.bicakci@windriver.com>
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---
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drivers/cpufreq/intel_pstate.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
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index 14504c761588..1bf7ae2ec8cd 100644
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--- a/drivers/cpufreq/intel_pstate.c
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+++ b/drivers/cpufreq/intel_pstate.c
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@@ -2109,6 +2109,7 @@ static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
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X86_MATCH(BROADWELL_D, core_funcs),
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X86_MATCH(BROADWELL_X, core_funcs),
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X86_MATCH(SKYLAKE_X, core_funcs),
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+ X86_MATCH(ICELAKE_X, core_funcs),
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{}
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};
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--
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2.25.1
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